Pin 9 is used as the non-inverted output of the second JK flip flop. Pin 8 is used as an inverted output of second JK flip flop. It is used to send the second input of JK flip flop. LOW pulse will be used to reset the data from the flip flop. Pin 6 is used as a reset pin by second JK flip-flop. Change of pulse from LOW to HIGH used to change the state. Pin 5 is used to provide the clock to the second JK flip flop in 74LS73. Vcc is used to apply the power supply to the JK flip flop to the whole IC. K-1 is the input pin used to send the bit to the JK flip flop. LOW pulse will be used to clear the data from the flip flop. Pin 2 used as resent pin for first flip-flop. Change of pulse is used to change the state. Pin 1 is the clock pin for first JK flip-flop. The user could even use a single flip flop without using the other. They both do not even depend on each other or anything. Now comes the 74S73 DUAL JK FLIP FLOP, whenever we need two JK flip flop at the same time then 74S73 DUAL JK FLIP FLOP IC is the best option. It gives four input combinations, which are logic 1, logic 0, no change and the third one is a toggle. JK flip flop clock gives some extra functions too. JK flip flop was named by the designer name Jack Kilby. JK flip-flop comes up with an internal SR latch circuit, but it also has a clock installed. To solve this problem a JK flip flop is used. The other problem is the correct latching problem may not occur when the enable pin is high. In SR latch the S = R = 0 should be avoided by the system. A single flip-flop represents two-state, in which data is stored is represented by 1 and the other is represented by 0. Before starting with 74LS73 DUAL JK FLIP-FLOP, let’s first understand that what is it? Flip-Flops and latches are those small devices used to store a single bit.

Multisim jk flip flop